Semiconductor Manufacturing
Chip-on-Wafer-on-Substrate
CoWoS (Chip-on-Wafer-on-Substrate) is TSMC's advanced packaging technology, introduced in 2016, that integrates high-performance processors with memory for AI computing systems. It has become the critical bottleneck for AI GPU production — TSMC's CoWoS capacity is sold out through 2026 despite scaling to 120,000-130,000 wafers per month.
Sources
Every claim traced to a primary source — evidence, recent activity, and insider filing behavior, all in one place.
Evidence
2 sources · 78% avg. source confidence
- SemiWiki / TrendForce industry analysis — TSMC's CoWoS capacity sold out through 2026 despite scaling to 120,000-130,000 wafers/month80% source confidence
- TrendForce — TSMC's CoWoS supply-demand gap seen narrowing from 20% to 10% by end-202675% source confidence
Dependency Map
What Chip-on-Wafer-on-Substrate depends on below, and who depends on Chip-on-Wafer-on-Substrate above — click any node to make it the new center, 2 levels deep.
Connection type
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The Story So Far (last 6 months)
Auto-generated from this entity's dated milestones, relationship updates, and sourced evidence — not AI-written, just sorted.
Emerging Signals
Advanced Packaging Capacity Demand
CriticalGrowth in advanced artificial intelligence processors is increasing demand for sophisticated packaging capacity.
Chip-on-Wafer-on-Substrate's Timeline
A sourced, dated history of Chip-on-Wafer-on-Substrate's key moments — founding to present.
Jan 2016 · Introduced by TSMC
TSMC introduced Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging, which later became the critical bottleneck technology for AI GPU production.
Jan 2026 · Capacity sold out through 2026
TSMC's CoWoS capacity sold out through 2026 despite scaling to 120,000-130,000 wafers per month.
How These Connections Evolved
How a relationship changed over time, not just its current state — sourced, dated, and traceable.
Chip-on-Wafer-on-Substrate ↔ Taiwan Semiconductor Manufacturing Company
2023–2026
TSMC scaled CoWoS capacity roughly tenfold from about 13,000 wafers/month at end of 2023 toward a projected 120,000-130,000 by end of 2026, yet demand remained 'sold out through 2026' against total industry demand near 1 million wafers.
Now
CoWoS is developed and operated by TSMC as part of its advanced packaging capabilities.
Chip-on-Wafer-on-Substrate ↔ Advanced Semiconductor Packaging
2025–2026
Advanced packaging (led by CoWoS) is projected to surpass 10% of TSMC's total revenue in 2026, up from about 8% in 2025, as NVIDIA and AMD accelerator demand drove continued capacity expansion.
Now
CoWoS is an important advanced semiconductor packaging technology.
Chip-on-Wafer-on-Substrate ↔ High Bandwidth Memory
2024–2026
CoWoS capacity scaling (roughly tenfold from 2023's 13,000 wafers/month toward 120,000-130,000 by 2026) directly gated how much HBM-integrated compute NVIDIA, AMD, and hyperscaler custom silicon could ship.
Now
CoWoS enables integration of advanced processors with high-bandwidth memory.
Chip-on-Wafer-on-Substrate ↔ AI Accelerators
2024–2026
CoWoS demand from NVIDIA's B200/GB200 and AMD's MI300X/MI400 accelerator lines kept the packaging technology 'sold out through 2026' even as TSMC capacity scaled roughly tenfold from 2023 levels.
Now
CoWoS supports integration requirements for advanced artificial intelligence accelerators.